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RENODE
Open-source simulation framework for complex embedded systems
MIT
ABOUT
Embedded firmware usually waits on boards, JTAG, and lab hardware. Renode simulates multi-core SoCs, peripherals, and networks so teams write, debug, and CI-test firmware before silicon or a development kit exists.
INTEGRATION GUIDE
1. Simulate a multi-core RISC-V or ARM board before hardware arrives
2. CI-test firmware against a virtual SoC instead of a physical lab rack
3. Model networks of embedded nodes and debug them from one Renode session
4. Co-simulate FPGA IP with software using Renode and Verilator
TAGS
renodesimulationembeddedfirmwarerisc-varmfpga