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BLUESPEC
High-level HDL compiler with guarded atomic actions
BSD-3-Clause
ABOUT
RTL modules are hard to compose because scheduling is implicit. Bluespec uses guarded atomic actions and a compiler-picked schedule so teams write modular hardware that still emits standard Verilog.
INSTALL
brew install bscINTEGRATION GUIDE
1. Compile Bluespec SystemVerilog or Bluespec Haskell to synthesizable Verilog
2. Simulate a design with Bluesim before handing Verilog to a vendor flow
3. Describe a processor or SoC with guarded atomic actions instead of always-blocks
4. Reuse Bluespec libraries for FIFOs, memories, and interconnect
TAGS
bluespechdlbsvverilogfpgaasiccompilerhardware